programmers resources
  http://www.intel-assembler.it/  (c)2017 intel-assembler.it   info@intel-assembler.it
 
Search :  
Lingua Italiana    English Language   
Index
 
just an empty assembly space
just an arrow Intel Platform
just an arrow Article & Guides
just an arrow Download Software


23/01/2009 Featured Article: How to remove Buzus Virus (permalink)




:::3276755:::
Bottone Scambio Directory Pubblicitaonline.it
Home Page | Articles & Guides | Download | Intel Platform | Contacts

Google
 


Bookmark and Share
Download 
Tell a friend



How to optimize code on a 386/486/Pentium

Intel Assembler Code Optimization and Pipelining

(by michael kunstelj)

How to optimize code on a 386/486/Pentium
Michael Kunstelj
This article is online from 3093 days and has been seen 6221 times





              How to optimize code on a 386/486/Pentium
                         Michael Kunstelj

(*** download for full text ***)

A manual about Intel Assembler Code Optimization. Many points are discussed 
in this paper, this is the index:

- Things A Cpu Must Check To Make A Pipeline Work Correctly
- Pipelining In Intel Processors:
- Pipelined,Superscalar & Branch Prediting Cpu: The Pentium
- Speeding Up 486/586 Code.
- Address Generation Stalls (Agi)
- Instruction Decoding Stalls:
- Register Access Cpu Stalls:
- Code Alignment
- Data Alignment
- Speeding Up Register And Operand Usage
- Handy Info On Speeding Up Integer Instructions
- Branch Prediction
- Amazing New 586 Optimizations And Speedups
- Pentium's Profiling Registers:
- 386 Optimization
- Decode-After-Jump Overhead
- Short Instructions
- Cache Optimization Techniques
- Not So Obvious Optimizations
- Complex Instructions
- The Addressing Mode Advantage
- 32Bit Access Speaks For Itself
- Self Compiled Code

----------------------------------
Brief intro about how a CPU works
----------------------------------

Now a brief intro on the innards Intel CPUs.

Most processors these days have within in them a system termed a "pipeline".
The 486 / 586 are certainly within this category.  However, most people 
aren't quite sure what exactly a pipeline is, here follows a complete
explanation:

The execution of a machine code instruction can be roughtly split
in five stages:   [n.b. this is a generic pipeline]
        1) FETCH instruction opcode and immediate data
        2) DECODE opcode and align immediata data into temporary registers
        3) CALCULATE ADDRESS OF OPERANDS and load 'em into memory.
           (calculate the address of memory locations to access
            and select the register operands to use)
           (sometimes called DECODE 2)
        4) EXECUTE instruction (loading memory operands if needed)
           & write results to INTERNAL registers
        5) WRITEBACK memory-operand results to memory

Every stage takes ONE OR MORE cpu cycles to be completed, but usually
a modern cpu needs just one cpu cycle for every execution stage
(excluding stages 1 and 5 that have to deal with memory/cache access
 and stage 4 when "complex" microcoded instructions are executed).

A cpu-core ( the "real" cpu, not cache support nor the other things
that are usually integrated into a modern cpu) has five "specialized"
units, one for every stage of instruction execution, plus a "register file"
(and ultra-fast on-chip memory where internal register values
 are stored) and a CONTROL UNIT.

The control unit "coordinates" the action of all the other units
so they can work together.

(*** download for full text ***)




Top
Download 
Tell a friend
Bookmark and Share



Similar Articles

FPU timing
8087-Pentium coprocessor timing and pairing
(by Quantasm)

Notes on Intel Pentium Processor
CMPXCHG8B CPUID MOV RDMSR RDTSC RSM WRMSR
(by Microsoft)

Optimizations for Intel's 32-Bit Processors
A 49 page guide on Intel Asm Code Optimization
(by Bev Zaharie)

Pairing Pentium Instructions
A brief doc on Pentium optimized programming
(by Quantasm / Mike Schmit)

Pentium Code Optimization using U-pipe V-pipe
A cross reference by instructions
(by Quantasm)

The Complete Pentium Instruction Set Table
(32 Bit Addressing Mode Only)
(by Sang Cho)

Tips on Saving Bytes in ASM Programs
Tricks on How to write compact code
(by Larry Hammick)

Write Optimized Pentium Code
A series of document on optimizing asm code
(by Agner Fog)

 Tags: optimize, pentium


webmaster jes
writers rguru, tech-g, aiguru, drAx

site optimized for IE/Firefox/Chrome with 1024x768 resolution

Valid HTML 4.01 Transitional


ALL TRADEMARKS ® ARE PROPERTY OF LEGITTIMATE OWNERS.
© ALL RIGHTS RESERVED.

hosting&web - www.accademia3.it

grossocactus
find rguru on
http://www.twitter.com/sicurezza3/
... send an email ...
Your name

Destination email

Message

captcha! Code